Sat May 10 18:50:40 EDT 2014
exponential IDAC (EIDAC)
Using MCP4922 it's possible to make an sinking EIDAC by using 3
thermally coupled transistors with matched V_BE -> I, and using one of
them in diode configuration connected to the V_REF, then using
In buffered mode, V_REF needs to be 0.04V away from both rails.
It might not even be necessary to match the transistors, as mismatch
shows up as a voltage difference. With 12 bit we have 4096 taps say
with 0.6V max this is (/ 0.6 4096) 0.15mV
So let's just make sure they are thermally coupled.
I have the MCP4922 available here.
Looking around, I also find the DAC8420, which has 4 outputs and LO/HI
reference inputs. This might be useful as this can also set the
current range corresponding to DAC=0. Nice feature, but it's a $44 part!
Actually, the feature is necessary if temperature compensation is
desired. And it is; over a 30 degrees range the difference in $V_T$
is about 10%.
I wonder if it's possible to just lift the DAC's ground up by the low
voltage bias. Sure is cheaper than finding a dual reference DAC.
What is the effect on the digital inputs? Absolute maximum is
VSS–0.3V - we're going to be over that.
Measured 2N3906 NPN
1mA -> 0.63V
1uA -> 0.44V
0.21V per 3 decades. Going down to 0.3V means another 1.5 decades to 30nA.
I guess that's possible, but would require quite a large resistor:
4.7V / 30nA -> 156M
I'm guessing it's going to be OK to go over it a little during data
transfer. There is probably a diode to ground so let's connect the
inputs with a resistor to catch the drop.
What about this:
- connect through diode with 10k pullupp
- run SPI clock / data inverted
Seems to work, except that a 1k resistor was needed from opamp output
to ground. LM324 can't sink much current? Maybe add a transistor to
bridge the voltage.