[<<][synth][>>][..]
Wed Jan 5 08:30:41 EST 2011

Simply dirty exponential converter

As mentioned by Gert, it might be possible to do it "simply, dirty" by
driving the base of a BJT directly, and solve the rest with the
(digital) feedback controller.

My concern is then to at least make it safe enough so we don't blow up
the BJT due to controller bugs.  Let's analyze this minimalistic
circuit:


                        I_out    RL 
                          o----/\/\/\---o Vcc
                          |
           R              /
    o---/\/\/\/----o----|/  Q  (i.e. 2n3904 NPN)
                   |    |\
                   |      V
PWM in         C =====    |
                   |      |
                   |      |
    o--------------o------o  GND


* Safety

    For safety there needs to be an R between the PWM drive and the
    base of Q.  If PWM gets stuck high, R will limit the current once
    C is charged.


* Filter

    The 3dB point should probably be set around 200Hz.  At 10MHz PIC
    clock resolution this gives 50000x oversampling, or a little over
    15 bits of binary modulation resolution.


* PWM levels

    The useful voltage range at the base of Q is determined by the
    dynamic range of the current.  We need about 4 decades which
    corresponds to roughly 10 V_T or about 250mV.

    V_BE at max current is around 600-700 mV.  The useful control
    range at the base will thus be about 300-700mV.  Allowing for some
    modulation headroom to get sufficiently fast rise times, it seems
    that PWM levels of 0-1V are going to be optimal.


* Impedance

    RC product is fixed by bandwidth constraints, so what remains is
    to pick the impedance or the R/C ratio.

    The impedance of the filter circuit needs to be relatively high
    because it needs to drive the transistor base current I_BE.  There
    are two ways of looking at this: C needs to be large wrt I_BE such
    that voltage drop due to I_BE should be much less than the
    expected ripple introduced by the load/unload currents.
    Alternatively one can say that the leak current due to I_BE should
    be much less than the load/unload currents, leading to small R.

    In any case: this load current is signal-dependent, so it needs to
    either be completely eliminated through low R and C impedance, or
    we need a compensation to deal with this nonlinearity on the fly.
    This compensation needs to be fast relative to the speed at which
    human hearing can detect de-tuning.  I'd say about 100-200ms for a
    stable tone.


    It seems C needs to be as high as possible as it needs to drive
    the transistor base current.  This load is nonlinear so we
    probably best keep its effects minimal in order to keep the
    PWM->V_BE transfer average as linear as possible.

    If C is large R needs to be relatively small.  R's low bound is
    set by a safety limit determined by the max current setting.

    Max I_BE is determined by the load of Q (say order 1mA) over Q's
    current gain, which can be highly variable.


* R_L

    Determined by max current output, probably around 1mA.  This is
    for test only: in operation the load will be an emitter coupled
    pair or an OTA input (requires PNP version of above schematic).


* Current filtering?

    It might be necessary to filter the current ripple using a small
    inductor at the collector of Q.  This to prevent "peaked" current
    wave forms due to the exponential conversion.

    However, when the voltage ripple at the base is small, the AC
    transfer function is fairly linear and the output ripple's wave
    shape should resemble the input, which will be +- triangular.


* Eliminate PWM reference?

    As mentioned above, PWM needs only 0-1V, so driving from 0-5V is
    mostly a waste of dynamic range.  However, driving from anything
    else than Vcc requires switching circuitry that significantly
    complicates the circuit.  I don't think the cheap buffer/inverter
    chips operate from a 1V supply.

    What about this hack: use 2 PIC pins attached to the buffer cap
    through 2 different resistors: one used for charge and one for
    discharge.  Picking a larger resistor for the "more distant" rail
    should make it possible to keep the rise times equal in the range
    of interest.  Say R_5V = 5 x R_0V.

    Instead of charging / discharging through 2 different resistors,
    we could also discharge through 2 resistors in parallel and charge
    through one.  When more pins are available, this could also be
    used to use some different rise/fall time configurations.

    Problem: the transfer is then no longer simply an RC filter.  My
    hunch is that it will be fine as long as you stay away far enough
    from the rails.  At some DC point, the 2 resistors act as current
    sources / sinks.

    However, this analysis is signal-dependent so introduces some
    nonlinearity in the transfer function that is measurable.

    Overall this nonlinearity does seem predictable and probably can
    be compensated once when the exact resistance values and cap value
    are known.


* Feedback

    This circuit is sensitive to the following disturbances, sorted
    from low to high variation over time.

       - Manufacturing spread due to V_BE spread and Q's current
         gain.  In theory this could be calibrated once.

       - Temperature drift: mostly 1st order during startup, after
         that it might be signal dependent if there's not enough
         thermal mass attached to the transistors.  All things equal,
         output current varies 20% over 50 degrees variation in die
         temperature.

       - Non-linearities in the control loop from duty cycle to V_BE.
         These are due to input bias current, the 2-resistor trick,
         and possibly transistor nonlearities (probably small).  This
         needs fast response in the order of 100ms, i.e. the time
         necessary for the ear to figure out an oscillator is not
         tuned correctly.

    Bottom line: it's quite useless without compensation.

    What measurements can or can't be used?

      * Due to the high dynamic range of the output current, we can't
        use current measuring resistors for feedback.  ADC resolution
        is too low.

      * We can use timing-based feedback derived from an oscillator.
        This can go to arbitrary high resolution by averaging capture
        times of oscillator transitions fed into the PIC over longer
        time scales.

        Note that we could use thermally coupled (and possibly V_BE
        matched) transistors to use one for driving the circuit and
        one for driving the feedback oscillator in case the circuit
        doesn't implement an oscillator but i.e. a filter or an
        envelope.

      * We can measure V_BE at 12 bits resolution, which should be
        enough for compensating the curved response, but of course
        doesn't solve V_BE spread or thermal drift.


    It seems best to split compensation into two parts:

      * Between runs, or once after manufacturing, we can store the
        compensation point in ROM.  This should capture the large but
        relatively constant variation due to component spread and aging.

      * The temperature spread can then be tracked on-line at a rate
        of say 1 update per second.  Nonlinearities can also be
        compensated this way, but this requires a tighter control
        loop.

    In general it seems better to aim for a tighter control loop that
    can capture both temperature variations and control chain
    non-linearities, than to design a laxer control loop and use
    feedforward calibration.  The former might relax some more
    high-frequency timing issues in the pulse modulator.

    Caveat: using frequency-feedback necessarily introduces a large
    delay in the feedback loop.  This might introduce instabiltities.
    

* Oscillator

    A bare bones sawtooth oscillator can be constructed from this
    circuit by


* Numbers

    Starting point: I_out max 1mA.  Everything else scales with this.
    Designing for PWM voltage of 1V.  

    Using 2N3904[1].  I'm not sure what to pick for nominal h_fe but
    let's use 100.  Data sheet range is 40-300 over the useful range.
    With 100, max I_BE is then 10mA.  Might need a different
    transistor with higher current gain.  Scale design accordingly.



[1] http://www.fairchildsemi.com/ds/2N/2N3904.pdf





[Reply][About]
[<<][synth][>>][..]