[<<][staapl][>>][..]
Thu Jul 31 00:08:25 EDT 2014

Master/slave uart

- Half-duplex
- direction part of protocol layer
- master generates start bit
- master or slave can pull data bits low

master side: 1/2 bit ticks

1 = high-Z,  R pulls up
0 = assert 0

- 0 : start bit
- nop
- x : data0 out
- data0 in
- x : data1 out
- data1 in
...
- data7 out
- data7 in
- stopbit 1 out
- nop
- clock ...



See code in busuart.f



[Reply][About]
[<<][staapl][>>][..]