Sun Aug 18 17:47:51 EDT 2013

PK2 schematic

Looking at shematics in:

Some notes:

- if VDD_TGT is off, AUX, ICSPCLK, ICSPDAT are turned off by PNP
  transistors Q2, Q3, Q5 resp.  (check again!)

- board has two 512kbit eeprom chips: 24LC512

- target voltage is generated with PWM through a 10K / 0.1u filter,
  followed by 2x gain amp.  this can then be switched to VDD_TGT,
  which is also fed back to analog in (straight).

- VPP pump is driven by PWM with a 1/3 feedback into ADC.  can be
  enabled to VPP, or VPP can be pulled down to perform reset.

- there don't seem to be any hazards.

Seems like a fun project to try to get this going.
Maybe together with the non-documented debug modes?