Sun Nov 6 10:56:35 EST 2011
I miss a non-interfering console log.
It would be nice if it were possible to put the pk2 into slave clock
mode such that the pic doesn't have any restrictions on how fast it
can send the data. Currently it seems to be problematic to do a
bit-banged interface with a slave clock on the pic when there is an
ISR active, i.e. as with the synth.
What about this:
- pic master clock, only 1-directional send.
- pk2 can interrupt pic by raising a particular line.
Looks like I2C and SPI are only supported with PK2 set as master.
Without a gigantic hack this is probably not going to work..
What about making an ICSP interrupt handler? I looked at this before
but it doesn't seem to be so simple because of the change-detect pins.
However, the on-chip debugger unit uses this approach. Maybe the
right approach is just to implement that debugger interrupt.
The real solution is a protocol that has no timing issues, meaning
each event needs to be acknowledged. The simplest protocol I can
think of is here. Can the PK2 do that?