[<<][staapl][>>][..]Mon Oct 12 16:37:46 CEST 2009
PIC24/30/33 addressing modes
Assembler addressing modes. The problem with the assembler syntax as
specified by Microchip is that it uses a syntax that's not so easily
expressed as s-expressions. However, addressing modes really are just
names mapped to bit representation so they might be handled as
constants. I'm just not quite sure about how this will work with
transformation / optimization.
So, let's just try it: setup the infrastructure (assembler + stub
compiler interface) and fill it in.
Next: implement 'drop' as "MOV [--W14], W0". The encoding:
01111 wwww B hhh dddd ggg ssss
B: byte mode
h: dst address mode
d: dst reg
g: src address mode
s: src reg
The problem here is that an s-expression syntax would probably need to
provide a bit of sugar, since the instruction format itself is quite
spartan. In the current framework, an instruction is a function with
a number of binary inputs. This needs to change to something more
general, preferably representable as combinators.
Also, `MOV' is used for a lot of different instruction tags.
000 Ws ;; Register direct
001 [Ws] ;; Indirect
010 [Ws--] ;; .. post-dec
011 [Ws++] ;; .. post-inc
100 [--Ws] ;; .. pre-dec
101 [++Ws] ;; .. pre-inc
11x [Ws+Wb] ;; Offset / Unused (RESET)
Proposed s-expr syntax:
The troubling element is offset addressing. Instead of representing
it as (+ Wb Ws) it needs to not refer to offset register, as this is a