Mon Jun 8 16:01:52 CEST 2009
Emulators & Data Flow
What about emulators?
This idea disappeared when I was rewriting the parser and module
structure. What this needs is a way to specify a "mother machine"
that can emulate anything, and a translation from assembler to this
machine language. This translation could be interpreted or compiled.
To start, primitives in Scheme should suffice.
The hardest part is probably the ALU. Memory emulation is really just
arrays, and memory-mapped I/O can be implemented using channels.
The real challenge is in combining the PE mechanism with a simulator.
However, this would kill the infinite precision types used. (Which
means semantics "projection" should be better defined.)
Specifiying the ALU and other hardware should be done in a declarative
single-assignment language like Oz, equipped with a parallel +
blocking statement semantics. This is closer to reality and closer to
concrete HDLs (which are closer to reality)..
Next: build an interpreter in Scheme that can execute this parallel