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Mon Aug 11 11:30:15 CEST 2008

Staapler

( It looks like Staapler is redundant since PicKit2 provides all the
necessary functionality.  It can program .HEX files and act as serial
passthrough. )

I started building 2 prototypes for the first iteration of the
Staapler based on a 18F1320.  Currently limited to programming /
debugging of Staapl based projects for PICs that support LVP.

It uses the Microchip 6-pin ICP/ICD interface, using the pinout from
the Olimex ICD2 clone (RJ jacks are too cubersome).

http://www.olimex.com/dev/images/PIC/PIC-ICSP.gif

In addition, the connector has an optional second row of 6 pins with a
FTDI serial TTL header in case an additional serial port is desired.

The hardware interface is a male 2x6 header with ICD2 and TTL232R
serial connector.  This is placed at target board edge.  The Staapler
is plugged on top of this (board outline = dotted lines), sticking out
(downward) over the target bord edge (dotted edge).

  . . . . . . . . . . . . .
  . +-------------------+ .
  . |  1  2  3  4  5  6 | .  ICD2
  . |  7  8  9 10 11 12 | .  TTY Serial (optional)
  . +-------------------+ .
  .                       .
  .  target board edge    .
-----------------------------
  .                       .
  .                       .

ICD2
 1 /MCLR  white
 2 VDD    red
 3 GND    black
 4 PGD    blue
 5 PGC    green
 6 PGM    yellow

SERIAL
 7 GND    black
 8 /CDS
 9 VDD    red
10 TXD    orange
11 RXD    yellow
12 /RTS


Next to the female connector for programming a target board, the
Staapler has a male Staapler-compatible connector.  This is used to
bootstrap the Staapler boot monitor using an ICD2 and connect to the
host using the serial interface.  It contains the following
connections for the female header:

   Target        Staapler 18F1320
   ------------------------------
   PGC           RA0
   PGD           RB0
   PGM           RA1
   VDD           RA2
   /MCLR         RA3
   GND           GND

This has PGD wired to RB0(INT0) so the Microchip protocol can be
easily extended with a target -> host ``terminal ready'' signal,
enabling the host to wait for replies without the need for polling.

The bootstrap plan is documented here:
http://zwizwa.be/ramblings/staapl/20080809-175417







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