[<<][simtrace][>>][..]
Fri Jul 19 11:35:47 EDT 2013

Phone side

How to get this started?  Let's hook up the SIMtrace to a throwaway
phone.  First thing that happens is assertion of 3V and wait for
reset.  This can be taken from the openpcd code.

Ok, got it going up to reset:

-- SIMtrace PHONE side driver 
-- Compiled: Jul 19 2013 16:04:50 --
PIOA & PA24 = 01000000
PIOA & PA24 = 00000000
PIOA & PA24 = 01000000
PIOA & PA24 = 00000000
PIOA & PA24 = 01000000
PIOA & PA24 = 00000000
PIOA & PA24 = 01000000
PIOA & PA24 = 00000000


Phone tries 4 times:
corresponds to scope measurements: 1.8 3 3 1.8 volts

So clock is present on the line, but TX doesn't want to advance.  Read
the sniffer code again.  Also, I don't see TXEN anywhere in the reader
code?

OK, found a bug: enabled US0 instead of US1.

Seems to +- work: can send bytes, but get a nack from time to time.
( What's a nack? )


Note: for simultaneous reader/phone interface, the polled architecture
needs to poll both interfaces, or it needs to be changed to
interrupt/DMA.


Looks like nack is asserted in the guard time slot.


www.smartcard.co.uk/tutorials/sct-itsc.pdf‎:

There is a further problem with the asynchronous character
transmission that makes life difficult for a PC to act as the
interface device. The 7816-3 standard defines an error detection and
recovery operation (mandatory for T=0) that cannot be managed by the
normal PC UART. When the receiver detects a parity error on reception
it takes the I/O line to the space or low state in the middle of the
first stop bit guard time.  The transmitter is mandated to sample the
I/O line at the start of the second stop bit guard time period. When
the error condition is sensed then the transmitter should retransmit
the erroneously received character.  Clearly the transmitter cannot be
outputting stop bits but must let the line go high during the guard
time in order to sense the line state.




[Reply][About]
[<<][simtrace][>>][..]