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Tue Jul 16 18:31:18 EDT 2013

for loop

    // tb: wait 400 cycles, 3.58MHz => 80┬Ás 48000000Hz  (3840)
    for( i=0; i<(120*(BOARD_MCK/1000000)); i++ ) {
    }

// With -O0

(gdb) disassemble ISO7816_cold_reset
Dump of assembler code for function ISO7816_cold_reset:
   0x0010a8c0 <+0>:	push	{r11, lr}
   0x0010a8c4 <+4>:	add	r11, sp, #4
   0x0010a8c8 <+8>:	sub	sp, sp, #8
   0x0010a8cc <+12>:	mov	r3, #0
   0x0010a8d0 <+16>:	str	r3, [r11, #-8]
   0x0010a8d4 <+20>:	b	0x10a8e4 <ISO7816_cold_reset+36>
   0x0010a8d8 <+24>:	ldr	r3, [r11, #-8]
   0x0010a8dc <+28>:	add	r3, r3, #1
   0x0010a8e0 <+32>:	str	r3, [r11, #-8]
   0x0010a8e4 <+36>:	ldr	r2, [r11, #-8]
   0x0010a8e8 <+40>:	ldr	r3, [pc, #48]	; 0x10a920 <ISO7816_cold_reset+96>
   0x0010a8ec <+44>:	cmp	r2, r3
   0x0010a8f0 <+48>:	bls	0x10a8d8 <ISO7816_cold_reset+24>
   0x0010a8f4 <+52>:	ldr	r3, [pc, #40]	; 0x10a924 <ISO7816_cold_reset+100>
   0x0010a8f8 <+56>:	ldr	r3, [r3, #24]
   0x0010a8fc <+60>:	ldr	r3, [pc, #32]	; 0x10a924 <ISO7816_cold_reset+100>
   0x0010a900 <+64>:	mov	r2, #24832	; 0x6100
   0x0010a904 <+68>:	str	r2, [r3]
   0x0010a908 <+72>:	ldr	r3, [pc, #24]	; 0x10a928 <ISO7816_cold_reset+104>
   0x0010a90c <+76>:	mov	lr, pc
   0x0010a910 <+80>:	bx	r3
   0x0010a914 <+84>:	sub	sp, r11, #4
   0x0010a918 <+88>:	pop	{r11, lr}
   0x0010a91c <+92>:	bx	lr
   0x0010a920 <+96>:	andeq	r1, r0, pc, ror r6
   0x0010a924 <+100>:			; <UNDEFINED> instruction: 0xfffc0000
   0x0010a928 <+104>:	andseq	r9, r0, r0, lsr sp
End of assembler dump.

// with -Os

Dump of assembler code for function ISO7816_cold_reset:
   0x001076b4 <+0>:	push	{r0, r1, r2, lr}
   0x001076b8 <+4>:	mov	r3, #0
   0x001076bc <+8>:	str	r3, [sp, #4]
   0x001076c0 <+12>:	ldr	r3, [pc, #64]	; 0x107708 <ISO7816_cold_reset+84>
   0x001076c4 <+16>:	b	0x1076d4 <ISO7816_cold_reset+32>
   0x001076c8 <+20>:	ldr	r2, [sp, #4]
   0x001076cc <+24>:	add	r2, r2, #1
   0x001076d0 <+28>:	str	r2, [sp, #4]
   0x001076d4 <+32>:	ldr	r2, [sp, #4]
   0x001076d8 <+36>:	cmp	r2, r3
   0x001076dc <+40>:	bls	0x1076c8 <ISO7816_cold_reset+20>
   0x001076e0 <+44>:	mvn	r3, #258048	; 0x3f000
   0x001076e4 <+48>:	ldr	r2, [r3, #-4071]	; 0xfe7
   0x001076e8 <+52>:	mov	r2, #24832	; 0x6100
   0x001076ec <+56>:	str	r2, [r3, #-4095]	; 0xfff
   0x001076f0 <+60>:	ldr	r0, [pc, #20]	; 0x10770c <ISO7816_cold_reset+88>
   0x001076f4 <+64>:	ldr	r3, [pc, #20]	; 0x107710 <ISO7816_cold_reset+92>
   0x001076f8 <+68>:	mov	lr, pc
   0x001076fc <+72>:	bx	r3
   0x00107700 <+76>:	pop	{r1, r2, r3, lr}
   0x00107704 <+80>:	bx	lr
   0x00107708 <+84>:	andeq	r1, r0, pc, ror r6
   0x0010770c <+88>:	eoreq	r0, r0, r0, lsr #10
   0x00107710 <+92>:	andseq	r6, r0, r12, lsr r11
End of assembler dump.


Weird..

!!

What I missed was the declaration:

    volatile unsigned int i;

This guarantees the variable is in memory, so the operations will not
be optimized away.





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