Wed Jan 29 05:56:22 EST 2020


Basic idea: this is a cross-wiring of RDY and ACK, and one delay is
necessary to make the loop work.  Where does the delay go?

One way to think about this, and maybe good to create a test case:

- Reader responds with ACK pulse as soon as it can handle RDY

- Writer uses that ACK to turn off the RDY signal

In the end I want to be able to do this continuously, e.g. be able to
transfer data at clock rate, but to see what actually happens, turning
it off might be a good idea.

So make a new test circuit that does only handshake.

EDIT: Ok I think I got it.  The trick is to use combinatorial output
on RDY and ACK, and to delay the ACK going into the writer.