Wed Jan 9 11:46:15 CET 2019
So if the point is to just express the circuit without regard to
things that could be optimized by re-arranging combinatorial logic, it
seems that the core idea behind my approach is to push 'compositional
thinking' much further into the core of the circuits.
If I look at Verilog or VHDL code, I see a lot of raw state machines.
I don't like this approach.
It seems to make more sense to create a couple of primitive state
machines, and solve problems using composition, which is easier to get
Basically, this is the Forth or generic FP idea.