[<<][rtl][>>][..]
Tue Oct 16 11:47:27 CEST 2018

The solution is factoring

It always is.

The sub-machine creates an enable signal.  It behaves a bit like an
S/R flipflop, with set triggered by a first data transition.

The other machine does just clock recovery, expecting a data and
enable signal.

But that's not enough maybe?  The first machine also needs to have a
clock start on the first edge.

So it seems that an enable/reset is actually not a bad way to do this.



[Reply][About]
[<<][rtl][>>][..]