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Wed Aug 15 08:12:41 EDT 2018

critical path

Use icetime.  Later, upgrade tools and have it do timing-based PNR.
It's about 2x the 36MHz.

If this gives issues, it is always possible to create two clock
domains, where clock recovery and FIFO write is done in the 36MHz
domain, and the CPU and control run at a lower rate.


tom@panda:~/asm_tools$ make x_soc_fpga.ct256.time
icetime -p x_soc_fpga.pcf -o x_soc_fpga.ct256.nl.v -P ct256 -d hx8k -t x_soc_fpga.ct256.asc
// Reading input .pcf file..
// Reading input .asc file..
// Reading 8k chipdb file..
// Creating timing netlist..

icetime topological timing analysis report
==========================================

Warning: This timing analysis report is an estimate!

Report for critical path:
-------------------------

        ram_25_15 (SB_RAM40_4K) [clk] -> RDATA[13]: 2.246 ns
     2.246 ns net_99005 (s14_rd[13])
        t521 (LocalMux) I -> O: 0.330 ns
        inmux_24_16_99177_99230 (InMux) I -> O: 0.260 ns
        lc40_24_16_5 (LogicCell40) in0 -> lcout: 0.449 ns
     3.284 ns net_95054 ($abc$1273$n154_1)
        t473 (LocalMux) I -> O: 0.330 ns
        inmux_23_16_95119_95168 (InMux) I -> O: 0.260 ns
        lc40_23_16_7 (LogicCell40) in3 -> lcout: 0.316 ns
     4.189 ns net_90979 ($abc$1273$n5)
        odrv_23_16_90979_50336 (Odrv12) I -> O: 0.540 ns
        t393 (Sp12to4) I -> O: 0.449 ns
        t395 (Span4Mux_v3) I -> O: 0.337 ns
        t394 (LocalMux) I -> O: 0.330 ns
        inmux_18_19_75079_75125 (InMux) I -> O: 0.260 ns
        lc40_18_19_3 (LogicCell40) in0 -> lcout: 0.449 ns
     6.552 ns net_70960 ($abc$1273$n7)
        odrv_18_19_70960_75043 (Odrv12) I -> O: 0.540 ns
        t223 (Sp12to4) I -> O: 0.449 ns
        t222 (Span4Mux_v2) I -> O: 0.252 ns
        t221 (IoSpan4Mux) I -> O: 0.323 ns
        t220 (LocalMux) I -> O: 0.330 ns
        t219 (IoInMux) I -> O: 0.260 ns
        t218 (ICE_GB) USERSIGNALTOGLOBALBUFFER -> GLOBALBUFFEROUTPUT: 0.617 ns
        t217 (gio2CtrlBuf) I -> O: 0.000 ns
        t216 (GlobalMux) I -> O: 0.154 ns
        t215 (INTERCONN) I -> O: 0.000 ns
        t214 (LocalMux) I -> O: 0.330 ns
        inmux_16_15_66433_66498 (InMux) I -> O: 0.260 ns
        lc40_16_15_6 (LogicCell40) in0 -> lcout: 0.449 ns
    10.515 ns net_62318 ($abc$1273$n48)
        odrv_16_15_62318_65784 (Odrv12) I -> O: 0.540 ns
        t168 (Span12Mux_v9) I -> O: 0.421 ns
        t167 (LocalMux) I -> O: 0.330 ns
        t166 (IoInMux) I -> O: 0.260 ns
        t165 (ICE_GB) USERSIGNALTOGLOBALBUFFER -> GLOBALBUFFEROUTPUT: 0.617 ns
        t164 (gio2CtrlBuf) I -> O: 0.000 ns
        t163 (GlobalMux) I -> O: 0.154 ns
    12.836 ns seg_18_16_glb_netwk_5_6

Resolvable net names on path:
     2.246 ns ..  2.835 ns s14_rd[13]
     3.284 ns ..  3.873 ns $abc$1273$n154_1
     4.189 ns ..  6.104 ns $abc$1273$n5
     6.552 ns ..  6.552 ns $abc$1273$n7
    10.066 ns .. 10.066 ns $abc$1273$n7$2
    10.515 ns .. 10.515 ns $abc$1273$n48

Total number of logic levels: 5
Total path delay: 12.84 ns (77.90 MHz)




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