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Sun Aug 12 14:25:41 EDT 2018

MyHDL RAM

Two things:
- Generate a code stub for the memory instructions in SeqTerm
- Possibly instantiate directly for synthesis?

The main question is: do I want a ROM?
If I do, I'll need to do a whole lot more work.

There is a tool to program just the ram:

https://stackoverflow.com/questions/36852808/modify-ice40-bitstream-to-load-new-block-ram-content
https://github.com/cliffordwolf/icestorm/tree/master/icebram


Basically, I will need access to the block ram over SPI anyway, so
maybe best to not do this?



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