Sun Aug 5 17:38:36 EDT 2018

Here's a big lesson

Full-branch conditionals are too hard to use.

It is often the case that a register only needs to be updated in a
very specific case.  It is too awkward to always have to specify the
non-update case explicitly.

But then again.  It might be due to lack of good abstraction.  The
specific case I'm looking at is stack push/pop.

Also, it might be possible to write this as a generic Seq extension,
instead of a core function.

EDIT: MyHDL and Verilog both support successive assignments in a
single "process".  Syntactically it is not a problemin Seq, but is the
semantics correct?  I really don't like this though..  Let's try to
work without it for a while.