[<<][rtl][>>][..]
Sun Aug 5 09:38:00 EDT 2018

Unify

- PRU
- Staapl macro forth
- CPU
- RTL
- DSP language

Is there a good way to model something at different levels of
abstraction that fits into Haskell?

It seems to be just tagless final + nested type classes.

I think today it's time for the CPU.  This will enable to test a
couple of things:

- code gen for large decoders
- forth-like macro language
- efficiency of emulation
- compare pattern generated by loop between sim and fpga




[Reply][About]
[<<][rtl][>>][..]