Mon Jul 16 18:48:17 EDT 2018

Slowing down state machines

A simple way seems to be to gate the inputs to all the registers.

A disadvantage is that it is no longer possible to create 1-cycle
pulses to be used elsewhere.

A solution to that is to use edge detectors at places where the pulses
are used, and encode the pulses differentially.  But that gives
problems with spurious pulses at reset.

It doesn't seem to be such a great idea...

Let's build a single async receiver and use an explicit "clock" input.