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Mon Jul 16 11:32:54 EDT 2018

UART and sub-clocking

Problem factorization.

- Async receiver is sample pulse generator and shift register
- Async transmitter is same, function of sample pulse to shift output

The main abstraction here when using a single clock domain, is to
perform a subsampling operation.  Given an operation, run it only when
an enable bit is set.




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