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Sun Feb 21 22:21:06 CET 2010

The DSL for DSP

Current ideas:

  - based on SSA/CFA dataflow networks & partial evaluation in Ai.hs
  - unit delays fit in this framework
  - build higher order combinators (ala Faust) on top of this, but
    prefer polynomials as base rep.

What would be the next step?  Build a tb-303 emulator that compiles
down to dsPIC assembly.  This should bring out some flukes in the
general idea as it contains everything:

  * high level objects (filters with control input smoothing)

  * nonlinear distortions

  * compilation to concrete architecture (i.e. register allocation &
    peephole optimization)

The last two are standard compilation techniques I'll probably not be
able to avoid when making proper compilers.  All the other
optimizations can be built in closer to the language itself.

( How does Staapl fit into the picture?  I guess that Staapl is the
bottom-up approach: a beefed up macro assembler embedded in Scheme.
Most of the tricks that come out of this experiment in Haskell/Ocaml
can probably carry over to Scheme in some way. )




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