Wed Feb 11 19:08:58 EST 2015


Can the on-chip PLL be used to synthesize an external clock?
I'm trying to solve the following problem:

- Generate a 6MHz signal from a signal in the 60kHz range, +- 0.5%

- The reason for the 60kHz is that I want to use a uC timer to drive
  the PLL.  Running at 72MHz a 1000-count gives me about 0.1% of

So I need about a 64x or 128x PLL.

Probably more hassle than getting an off-the-shelf PLL.