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Sat Feb 7 13:17:24 EST 2015

Bit-banded accesses versus read-modify-write accesses

The bit-band operation to achieve the same result requires only a
single instruction and one or two processor clock cycles.

These operations are available in a fixed range of addresses, with
each bit in the address range 0x20000000 to 0x200fffff being aliased
at a word (4-byte) aligned address in the range 0x22000000 to
0x23fffffc in the SRAM space. The same mechanism applies to the
corresponding address ranges in the region 0x40000000 to 0x43fffffc in
the Peripheral space.

This setting TIM2.SR.UIF = 0 on STM32F103

 8002e52:	4b08      	ldr	r3, [pc, #32]	; (8002e74 <tim2_isr+0x24>)
 8002e54:	2200      	movs	r2, #0
 8002e56:	601a      	str	r2, [r3, #0]
 ...
 8002e74:	42000400 	.word	0x42000400


[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16401.html
[2] http://spin.atomicobject.com/2013/02/08/bit-banding/



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