Thu Jun 23 13:53:25 CEST 2011

AT91SAM7 and reset

Some notes about using OpenOCD on the AT91SAM7 platform.  These notes
reflect behaviour with a recent OpenOCD git version and using the
ARM-USB-OCD programmer.

1.  Lower clock when requesting a reset.  I can get a reliable reset
    when I lower the clock to 100kHz.  Higher than that gives
    problems.  Other commands give no problems if ARM clock is set to
    fast.  Flash is independent of ARM.

2.  The AT91SAM7 can't reset in halt, which means that it _will_
    execute code in Flash before any JTAG debugger can halt the chip.
    Therefore it's best to use soft_reset_halt whenever possible and
    use "reset init" only when JTAG gets out of sync, i.e. when target
    is power-cycled.