Thu Aug 19 17:50:41 CEST 2010


With my recent experience using gdb + gdbserver on an Atmel AT91SAM7
using a closed Segger JLink[4] interface I'm wondering what tools I
should get to be able to use all full open source chain.

1. How to get my ET-ARM STAMP LPC2110[1] board to work with JTAG?
   I.e. how does the plugin board[2] connect to the stamp board?

2. What JTAG interface to use to get maximum support from OpenOCD[3]?
   What are the different JTAG features some have and some don't?  How
   do all the pieces fit together? (uC JTAG + gdbserver).

   Olimex[5] has several.

3. Can this work on a DIP-package small uC?  Probably not PIC as it
   has an incompatible proprietary debugging interface (one reason to
   stop using it..), but maybe AVR?  I can only find AVR32 links..
   Does AVR8 have JTAG actually[6]?

First I wonder, is there a natural way to map a 2-way serial byte
stream to a JTAG stream?  JTAG is SPI, right?

Then: is there any monitor code running on the target to support
JTAG/gdbserver functionality that is not implemented in hardware?

Ok, the basic idea as explained in Dominic Rath's thesis[8].  

  On-chip debugging allows external control over the uC as opposed to
  sub-based debugging which would use a monitor and some kind of
  interrupt mechanis, i.e. a serial port.

  ARM7 and ARM9 have halt mode debugging, where the core is completely
  stopped.  Both cores support 2 comparators that allow to break on
  instruction fetches or data access.

Disadvantage of stub-based programming for flash uC is setting of
breakpoints (as opposed to code in RAM).  HW debug can set hardware

[1] http://www.futurlec.com/ET-ARM_Stamp.shtml
[2] http://www.futurlec.com/ET-ARM_Stamp_Board.shtml
[3] http://openocd.berlios.de/web/
[4] http://www.segger.com/cms/jlink.html
[5] http://olimex.com/dev/index.html
[6] http://www.scienceprog.com/build-your-own-avr-jtagice-clone/
[7] http://sourceforge.net/apps/mediawiki/urjtag/index.php?title=Main_Page
[8] http://openocd.berlios.de/thesis.pdf